Maximizing the Filter Rate of L0 Compiler-Managed Instruction Stores by Pinning

We present an allocation algorithm for small L0 compiler-managed instruction stores (cmiss) that significantly reduces the energy consumed by the instruction storage hierarchy. With our algorithm, cmiss simultaneously achieve low access energy, low performance overhead, and high filter rate. Despite the lack of associativity in cmiss, our algorithm achieves filter rates similar to those of filter caches by pinning— allocating frequently executed instructions to exclusive locations. An evaluation of our algorithm on 17 embedded applications shows that the energy consumed by the